HeteroBench Multi-kernel benchmarks for heterogeneous systems. SAMT Optimized spatial architecture mapping for Transformer accelerators. CoVA An MLIR-based compilation flow for versatile architecture. Sparsity-Aware Path Planning Accelerator FPGA acceleration for autonomous path planning. PyAIE Python-based programming framework for Versal ACAP AI Engines. Associative Processor on FPGA Design exploration of associative processor implementation on FPGA.