CoVA Compiler for Versatile Architectures: an MLIR-based compiler for CPUs and GPUs. HeteroBench Multi-kernel benchmarks for heterogeneous systems. HeteroTask Offline DAG scheduling and distributed CPU/GPU execution. PyAIE Python-based programming framework for Versal ACAP AI Engines. Sparsity-Aware Path Planning Accelerator FPGA acceleration for autonomous path planning. SAMT Optimized spatial architecture mapping for Transformer accelerators. Associative Processor on FPGA Design exploration of associative processor implementation on FPGA.